AMD EPYC 9000 “Genoa” Processor Family Featuring All-New Zen 4 Core Architecture Leaked By Yuuki_AnS. The range list includes several SKUs with their name, number of cores and clock speeds.
AMD EPYC 9000 Genoa Processor Family Leak: 18 Running SKUs with up to 96 Zen 4 Cores, 384MB Cache, 400W TDP
Starting with the details, AMD has already announced that EPYC Genoa will be compatible with the new SP5 platform which brings a new socket so SP3 compatibility would exist until EPYC Milan. EPYC Genoa processors would also support new memory and capabilities. In the latest details, it is reported that the SP5 platform will also feature an all-new socket which will feature 6096 pins arranged in the Land Grid Array (LGA) format. It will be by far the biggest socket AMD has ever made, with 2002 pins more than the existing LGA 4094 socket.
AMD EPYC Milan Zen 3 vs EPYC Genoa Zen 4 Size Comparisons:
|Processor name||AMD EPYC Milano||AMD EPYC Genoa|
|Process node||TSMC 7nm||TSMC 5nm|
|Basic Architecture||Zen 3||Zen 4|
|Zen CCD array size||80mm2||72mm2|
|Zen IOD Matrix Size||416mm2||397mm2|
|Substrate area (package)||To be determined||5428mm2|
|Socket name||LGA 4094||LGA 6096|
|TDP of max.||450W||700W|
The socket will support AMD’s EPYC Genoa and future generations of EPYC chips. Speaking of the Genoa processors themselves, the chips will pack a whopping 96 cores and 192 threads. These will be based on AMD’s all-new Zen 4 core architecture, which is expected to deliver insane IPC improvements while utilizing the 5nm TSMC process node.
To reach 96 cores, AMD needs to pack more cores into its EPYC Genoa CPU package. AMD is supposed to achieve this by incorporating up to 12 CCD sensors in its Genoa chip. Each CCD will feature 8 cores based on the Zen 4 architecture. This matches the increase in socket size and we could be looking at a massive CPU interposer, even larger than existing EPYC CPUs. The CPU is said to feature TDPs of 320W which will be configurable up to 400W. You can find more details regarding the SP5 platform here.
As for SKUs, Yuuki_AnS disclosed a total of 18 SKUs, 6 of which are still in ES status, but the rest of the 12 SKUs are production ready. The lineup will include four “F” or frequency-optimized SKUs, three “P” single-outlet SKUs, and 11 standard SKUs. Note that these are just the SKUs that have been leaked and there may be more in the works. That said, there will be multiple EPYC 9000 Genoa CPU configurations ranging from 16, 24, 32, 48, 64, 84, and up to 96 Zen 4 cores. Some SKUs will come with partially enabled chiplets for increased cache and we let’s get up to 384MB of L3 cache. Don’t forget that “Genoa-X” V-Cache variants are also planned, so we will have a total of 1152 MB LLC on these parts.
Clock rates vary from processor to processor, with some high TDP parts going as high as 3.8 GHz, while the best 96C parts run around 2.0 to 2.15 GHz at TDPs of 320-400W. It looks like the top SKUs will include the EPYC 9654P which has 96 cores, 192 threads, 384MB cache, clock speeds of up to 2.15GHz and a TDP of 360W while a 400W variant for the dual-socket SP5 platform is also in the works and listed with the same clock speeds in the ES state but a higher TDP of 400W. Here is the EPYC Genoa stack 9000:
AMD EPYC 9000 Genoa Processor SKU “Preliminary” Specifications:
|Processor name||Cores / Threads||Hidden||Clock speeds||PDT||State|
|EPYC-9654P||96/192||384 MB||2.0-2.15GHz||360W||Ready for production|
|EPYC 9534||64/128||256 MB||2.3-2.4GHz||280W||Ready for production|
|EPYC 9454P||48/96||256 MB||2.25-2.35GHz||290W||Ready for production|
|EPYC 9454||48/96||256 MB||2.25-2.35GHz||290W||Ready for production|
|EPYC 9354P||32/64||256 MB||2.75-2.85GHz||280W||Ready for production|
|EPYC 9354||32/64||256 MB||2.75-2.85GHz||280W||Ready for production|
|EPYC 9334||32/64||128 MB||2.3-2.5GHz||210W||Ready for production|
|EPYC 9274F||24/48||256 MB||3.4-3.6GHz||320W||Ready for production|
|EPYC 9254||24/48||128 MB||2.4-2.5GHz||200W||Ready for production|
|EPYC 9224||24/48||64 MB||2.15-2.25GHz||200W||Ready for production|
|EPYC 9174E||16/32||256 MB||3.6-3.8GHz||320W||Ready for production|
|EPYC 9124||16/32||64 MB||2.6-2.7GHz||200W||Ready for production|
|EPYC 9000 (ES)||96/192||384 MB||2.0-2.15GHz||320-400W||ES|
|EPYC 9000 (ES)||84/168||384 MB||2.0GHz||290W||ES|
|EPYC 9000 (ES)||64/128||256 MB||2.5-2.65GHz||320-400W||ES|
|EPYC 9000 (ES)||48/96||256 MB||3.2-3.4GHz||360W||ES|
|EPYC 9000 (ES)||32/64||256 MB||3.2-3.4GHz||320W||ES|
|EPYC 9000 (ES)||32/64||256 MB||2.7-2.85GHz||260W||ES|
Apart from that, it is stated that AMD’s EPYC Genoa processors will feature 128 PCIe Gen 5.0 lanes, 160 for a 2P (dual-socket) configuration. The SP5 platform will also feature support for DDR5-5200 memory, which is an insane improvement over existing DDR4-3200 MHz DIMMs. But that’s not all, it will also support up to 12 channels of DDR5 memory and 2 DIMMs per channel, which will allow up to 3TB of system memory using 128GB modules. AMD EPYC 9000 Genoa is expected to launch in the second half of this year.